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ScratchV vs LLVM — 追赶 LLVM 进度

LLVM RV64FD (float32) — baseline (target ≤1.0x) | ScratchV RV32IM (Q16.16) — 1.58× current

−72%

动态指令减少

5.3x

vs LLVM 差距缩小

−72%

推理时间减少 @100MHz

2.08x

当前 vs LLVM

1 run recorded · history.json

1. Version vs LLVM Progress · 版本追赶进度

Each version's dynamic instruction ratio vs LLVM baseline (1.0x = LLVM). Goal: ≤1.0x (beat LLVM).

动态指令趋势

绿色虚线 = LLVM float32 baseline (1.06B) | 橙色折线 = ScratchV 各版本 | 勾选版本框进行对比

v0.1.0v0.2.0v0.3.0全选仅优化版

LLVM baseline

ScratchV

2. Dynamic Instruction Distribution · 指令粒度

Per-category breakdown with percentages — identifies compilation instruction bottlenecks

Category	LLVM	LLVM %	ScratchV	SV %	SV/LLVM
ALU R-type	131,372,739	7.1%	929,645,352	32.0%	7.08×
ALU I-type	524,713,477	28.4%	922,090,821	31.7%	1.76×
FP	524,722,184	28.4%	—	0.0%	0.00×
Shift	—	0.0%	255,137,123	8.8%	—
Load	527,439,523	28.6%	528,104,451	18.2%	1.00×
Store	3,053,618	0.2%	6,830,882	0.2%	2.24×
Branch	80,766,507	4.4%	265,412,804	9.1%	3.29×
Jump	25,779,684	1.4%	—	0.0%	0.00×
Upper immediate	27,157,604	1.5%	—	0.0%	0.00×
Total	1,845,005,337	100%	2,907,221,433	100%	1.58×

Biggest bottleneck: ALU R-type (7.08x vs LLVM). " Store ratio 2.24×: LLVM keeps accumulators in FP registers (few stores). ScratchV spills to stack every MAC due to limited registers.

3. Operator Comparison · 算子粒度

Per-operator-type dynamic instruction ratio (ScratchV / LLVM) — identifies which operator types have the most optimization headroom

Per-Operator Instruction Type Breakdown

Category distribution (% of total dynamic instructions) per operator type — compare compiler instruction mix patterns

conv (3 ops, ratio: 1.14x)

Category	SV %	LLVM %
ALU I	31.3%	28.6%
FP	0.0%	28.6%
Load	25.0%	28.6%
ALU R	25.0%	7.1%
Shift	12.5%	0.0%
Branch	3.7%	4.3%
Jump	1.2%	1.4%
Upper	1.2%	1.4%

gemm (2 ops, ratio: 1.38x)

Category	SV %	LLVM %
ALU I	33.3%	23.1%
FP	0.0%	30.8%
Load	22.2%	30.8%
ALU R	22.2%	7.7%
Shift	11.1%	0.0%
Branch	5.6%	4.6%
Upper	3.3%	3.1%
Jump	2.2%	0.0%

maxpool (3 ops, ratio: 0.96x)

Category	SV %	LLVM %
ALU I	34.8%	33.3%
Load	26.1%	25.0%
Branch	13.0%	12.5%
ALU R	8.7%	8.3%
Store	8.7%	4.2%
FP	0.0%	8.3%
Jump	4.3%	4.2%
Upper	4.3%	4.2%

relu (4 ops, ratio: 1.88x)

Category	SV %	LLVM %
ALU I	26.7%	25.0%
Load	26.7%	25.0%
Store	13.3%	25.0%
Branch	13.3%	12.5%
FP	0.0%	12.5%
ALU R	6.7%	0.0%
Jump	6.7%	0.0%
Upper	6.7%	0.0%

sigmoid (1 ops, ratio: 0.72x)

Category	SV %	LLVM %
FP	0.0%	32.0%
ALU I	27.8%	20.0%
ALU R	16.7%	12.0%
Branch	16.7%	8.0%
Load	11.1%	12.0%
Shift	11.1%	0.0%
Store	5.6%	8.0%
Jump	5.6%	4.0%
Upper	5.6%	4.0%

Orange = ScratchV dominant · Green = SV lower · Blue = LLVM. Longer bar = higher % of total instructions.

Model	Op Type	SV Static	SV Dynamic	LLVM Dynamic	Ratio
cnn_fc1_Gemm	gemm	87	62,005,247	44,781,567	1.38x
cnn_fc2_Gemm	gemm	80	1,151	831	1.39x
cnn_layer1.0_Conv	conv	165	425,115,646	371,976,190	1.14x
cnn_layer1.1_Relu	relu	56	14,760,960	7,872,512	1.88x
cnn_layer1.2_MaxPool	maxpool	97	5,658,368	5,904,384	0.96x
cnn_layer2.0_Conv	conv	165	1,097,367,551	960,196,607	1.14x
cnn_layer2.1_Relu	relu	56	3,572,160	1,905,152	1.88x
cnn_layer2.2_MaxPool	maxpool	97	1,369,328	1,428,864	0.96x
cnn_layer3.0_Conv	conv	165	513,294,335	449,132,543	1.14x
cnn_layer3.1_Relu	relu	56	1,670,880	891,136	1.88x
cnn_layer3.2_MaxPool	maxpool	96	618,976	645,888	0.96x
cnn_relu1_Relu	relu	54	960	512	1.88x
cnn_sigmoid1_Sigmoid	sigmoid	69	18	25	0.72x

4. Optimization Timeline · 优化时间线

Click to expand each version — instruction category breakdown with percentages and per-operator comparison

优化时间线 — 点击展开查看详情

v0.1.02026-06-04

初始版本 — ONNX→RISC-V 编译器初版

Conv/Gemm/MaxPool 均使用直接循环 + 完整地址重算 + 边界检查。Q16.16 定点乘使用 MULH+MUL 全精度。

▸ 点击展开详情（指令分类 + 算子对比）

优化要点

ONNX 模型解析与内存规划
Conv2D 多层循环直接展开，逐元素边界检查
Gemm 矩阵乘法基础实现
MaxPool 滑动窗口基础实现
Q16.16 定点乘法 (MULH+MUL)

7.80B

动态指令

7.37x

vs LLVM 比值

30 instr/MAC

内层循环效率

78.0s

@100MHz 推理时间

与 LLVM 差距: 6.74B 条指令 (7.37x)

Dynamic Instruction Breakdown

Category	Count	%
ALU R-type	2494.9M	32.0%
ALU I-type	2474.6M	31.7%
FP	0	0.0%
Shift	684.7M	8.8%
Load	1417.3M	18.2%
Store	18.3M	0.2%
Branch	712.3M	9.1%
Jump	0	0.0%
Upper imm.	0	0.0%
Total	7.80B	100%

Per-Operator Type

Op Type	Dynamic Insns	vs LLVM
conv	5.46B	3.07x
gemm	277.3M	6.19x
maxpool	85.7M	10.73x
relu	57.3M	5.37x
sigmoid	53	2.15x

v0.2.02026-06-05

Conv2D 内层循环优化

四项优化针对最内层循环（占动态指令 97%）：边界检查移除、常量外提、指针步进、强度削减。

▸ 点击展开详情（指令分类 + 算子对比）

优化要点

边界检查移除: pads=0 时跳过 ih/iw 越界检查，节省 8条/MAC
常量外提: a2-a7 空闲寄存器预加载 K/stride/W/H*W/C_in，节省 16条/MAC
指针步进: 最内层 kw 循环使用 in_ptr/wt_ptr 指针加法代替完整地址重算，节省 12条/MAC
强度削减: ih_base/iw_base 在 oh/ow 循环外一次性计算，节省 1条/MAC

较上一版:动态指令-58.7%vs LLVM+4.33x推理时间-58.7%

3.22B

动态指令

3.04x

vs LLVM 比值

12 instr/MAC

内层循环效率

32.2s

@100MHz 推理时间

与 LLVM 差距: 2.16B 条指令 (3.04x)

Dynamic Instruction Breakdown

Category	Count	%
ALU R-type	1030.2M	32.0%
ALU I-type	1021.8M	31.7%
FP	0	0.0%
Shift	282.7M	8.8%
Load	585.2M	18.2%
Store	7.6M	0.2%
Branch	294.1M	9.1%
Jump	0	0.0%
Upper imm.	0	0.0%
Total	3.22B	100%

Per-Operator Type

Op Type	Dynamic Insns	vs LLVM
conv	2.26B	1.27x
gemm	114.5M	2.56x
maxpool	35.4M	4.43x
relu	23.6M	2.22x
sigmoid	22	0.89x

v0.3.02026-06-08

Conv2D 循环展开 + ic 指针增量

K=3 时完全展开 kw/kh 循环（9个MAC线性排列），消除全部内层循环控制指令。ic 迭代改用指针增量代替地址重算。

▾ 点击收起详情

优化要点

kw+kh 全展开: K=3 时 9个MAC 直接展开, 消除 addi+slt+bne 循环控制, 节省 ~4条/MAC
ic 指针增量: 预计算 channel_advance 常数, ic 层从 14条地址重算 → 1条 add
行跳跃常量外提: 释放 s10/s11 寄存器存放 row_advance 和 ic_advance

较上一版:动态指令-31.6%vs LLVM+0.96x推理时间-31.7%

2.20B

动态指令

2.08x

vs LLVM 比值

8 instr/MAC

内层循环效率

22.0s

@100MHz 推理时间

与 LLVM 差距: 1.14B 条指令 (2.08x)

Dynamic Instruction Breakdown

Category	Count	%
ALU R-type	704.7M	32.0%
ALU I-type	699.0M	31.7%
FP	0	0.0%
Shift	193.4M	8.8%
Load	400.3M	18.2%
Store	5.2M	0.2%
Branch	201.2M	9.1%
Jump	0	0.0%
Upper imm.	0	0.0%
Total	2.20B	100%

Per-Operator Type

Op Type	Dynamic Insns	vs LLVM
conv	1.54B	0.87x
gemm	78.3M	1.75x
maxpool	24.2M	3.03x
relu	16.2M	1.52x
sigmoid	15	0.61x

ScratchV CI · LLVM RV64FD baseline · GitHub · Optimization History · Generated 2026-07-19 11:02